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Copy file name to clipboardExpand all lines: docs/psoc6/quickref.rst
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@@ -599,14 +599,30 @@ PDM - PCM bus
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PDM/PCM is a asynchronous operation used to connect digital audio devices.
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At the physical level, a bus consists of 2 lines: CLK, DATA.
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PDM objects can be created and initialized using::
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.. warning::
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This is not part of the core MicroPython libraries. Therefore, not mapping any existing machine class API and neither supported by other ports.
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The following specialization applies for configuring PDM-PCM bus in this port:
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Before using the PDM-PCM bus, the clock frequency needs to be set. The PDM-PCM clock frequency can be set to 24.576 MHz or 22.579 MHz depending upon the sample rate. In order to set the frequency, use the following function:
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::
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machine.freq(AUDIO_PDM_24_576_000_HZ) # set the frequency of the clock to 24.576 MHz. For sample rates: 8 / 16 / 48 kHz
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machine.freq(AUDIO_PDM_22_579_000_HZ) # set the frequency of the clock to 22.579 MHz. For sample rates: 22.05 / 44.1 KHz
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PDM-PCM objects can be created and initialized using::
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from machine import PDM_PCM
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from machine import Pin
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clk_pin = "P10_4"
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data_pin = "P10_5"
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machine.freq(AUDIO_PDM_24_576_000_HZ)
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pdm_pcm = PDM_PCM(
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0,
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sck=clk_pin,
@@ -637,7 +653,7 @@ Constructor
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- ``clk`` is a pin object for the clock line
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- ``data`` is a pin object for the data line
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- ``sample_rate`` specifies audio sampling rate
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- ``sample_rate`` specifies audio sampling rate. It can be set to 8 / 16 / 48 KHz for which the clock frequency should be set to 24.576 MHz or to 22.05 / 44.1 KHz while clock should be set to 22.579 MHz.
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