diff --git a/ports/psoc6/modtime.c b/ports/psoc6/modtime.c
index d74e681d3764f..1def24df9a9f1 100644
--- a/ports/psoc6/modtime.c
+++ b/ports/psoc6/modtime.c
@@ -101,6 +101,6 @@ static mp_obj_t mp_time_time_get(void) {
         mp_raise_ValueError(MP_ERROR_TEXT("cyhal_rtc_read failed !"));
     }
 
-    return mp_obj_new_int_from_ull(timeutils_seconds_since_epoch(current_date_time.tm_year, current_date_time.tm_mon, current_date_time.tm_mday,
+    return timeutils_obj_from_timestamp(timeutils_seconds_since_epoch(current_date_time.tm_year, current_date_time.tm_mon, current_date_time.tm_mday,
         current_date_time.tm_hour, current_date_time.tm_min, current_date_time.tm_sec));
 }
diff --git a/ports/psoc6/mpconfigport.h b/ports/psoc6/mpconfigport.h
index 8be1db839989b..242cd6968bebe 100644
--- a/ports/psoc6/mpconfigport.h
+++ b/ports/psoc6/mpconfigport.h
@@ -154,6 +154,9 @@
 #define MICROPY_PY_MACHINE_PDM_PCM              (1)
 #define MICROPY_PY_MACHINE_PDM_PCM_RING_BUF     (1)
 
+#define MICROPY_TIME_SUPPORT_Y1969_AND_BEFORE   (1)
+
+#define MICROPY_PY_MACHINE_PULSE                (1)
 // VFS
 #define MICROPY_VFS                             (1)
 #define MICROPY_READER_VFS                      (1)
diff --git a/tests/ports/psoc6/board_ext_hw/diagrams/cy8ckit-062s2-ai-hil-test-diag.png b/tests/ports/psoc6/board_ext_hw/diagrams/cy8ckit-062s2-ai-hil-test-diag.png
index 99b269ab91f5b..672d96c51e676 100644
Binary files a/tests/ports/psoc6/board_ext_hw/diagrams/cy8ckit-062s2-ai-hil-test-diag.png and b/tests/ports/psoc6/board_ext_hw/diagrams/cy8ckit-062s2-ai-hil-test-diag.png differ
diff --git a/tests/ports/psoc6/board_ext_hw/diagrams/cy8cproto-062-4343w-hil-test-diag.png b/tests/ports/psoc6/board_ext_hw/diagrams/cy8cproto-062-4343w-hil-test-diag.png
index c9f18d8443028..059139fb9eccf 100644
Binary files a/tests/ports/psoc6/board_ext_hw/diagrams/cy8cproto-062-4343w-hil-test-diag.png and b/tests/ports/psoc6/board_ext_hw/diagrams/cy8cproto-062-4343w-hil-test-diag.png differ
diff --git a/tests/ports/psoc6/board_ext_hw/diagrams/cy8cproto-063-ble-hil-test-diag.png b/tests/ports/psoc6/board_ext_hw/diagrams/cy8cproto-063-ble-hil-test-diag.png
index 8964d776c4bd8..0fc191b5e30bd 100644
Binary files a/tests/ports/psoc6/board_ext_hw/diagrams/cy8cproto-063-ble-hil-test-diag.png and b/tests/ports/psoc6/board_ext_hw/diagrams/cy8cproto-063-ble-hil-test-diag.png differ
diff --git a/tests/ports/psoc6/board_ext_hw/multi/time_pulse_sig_gen.py b/tests/ports/psoc6/board_ext_hw/multi/time_pulse_sig_gen.py
new file mode 100644
index 0000000000000..49f5bff7142a1
--- /dev/null
+++ b/tests/ports/psoc6/board_ext_hw/multi/time_pulse_sig_gen.py
@@ -0,0 +1,53 @@
+from machine import Pin
+import os
+import time
+
+# Allocate pin based on board
+board = os.uname().machine
+if "CY8CPROTO-062-4343W" in board:
+    pulse_out_pin = "P12_1"
+    ack_in_pin = "P12_3"
+elif "CY8CPROTO-063-BLE" in board:
+    pulse_out_pin = "P5_2"
+    ack_in_pin = "P6_2"
+elif "CY8CKIT-062S2-AI" in board:
+    pulse_out_pin = "P9_5"
+    ack_in_pin = "P9_7"
+
+ack_recvd = False
+
+
+def cback(pin):
+    global ack_recvd
+    ack_recvd = True
+
+
+def blocking_delay_ms(delay_ms):
+    start = time.ticks_ms()
+    while time.ticks_diff(time.ticks_ms(), start) < delay_ms:
+        pass
+
+
+pulse_out = Pin(pulse_out_pin, Pin.OUT)
+ack_in = Pin(ack_in_pin, Pin.IN)
+ack_in.irq(trigger=Pin.IRQ_RISING, handler=cback)
+
+# Starting condition always low pulse
+pulse_out.low()
+
+while not ack_recvd:
+    pass  # Wait for the Begin ACK signal
+
+blocking_delay_ms(100)
+
+# Generate high pulse
+pulse_out.high()
+
+# Wait for 1sec to time the pulse
+blocking_delay_ms(1000)
+
+pulse_out.low()
+
+# Deinitialize the pins
+pulse_out.deinit()
+ack_in.deinit()
diff --git a/tests/ports/psoc6/board_ext_hw/multi/time_pulse_us.py b/tests/ports/psoc6/board_ext_hw/multi/time_pulse_us.py
new file mode 100644
index 0000000000000..af39c6f202f7a
--- /dev/null
+++ b/tests/ports/psoc6/board_ext_hw/multi/time_pulse_us.py
@@ -0,0 +1,42 @@
+from machine import Pin, time_pulse_us
+import os
+import time
+
+# Allocate pin based on board
+board = os.uname().machine
+if "CY8CPROTO-062-4343W" in board:
+    pulse_in_pin = "P12_1"
+    ack_out_pin = "P12_3"
+elif "CY8CPROTO-063-BLE" in board:
+    pulse_in_pin = "P5_2"
+    ack_out_pin = "P6_2"
+elif "CY8CKIT-062S2-AI" in board:
+    pulse_in_pin = "P9_2"
+    ack_out_pin = "P9_7"
+
+
+def blocking_delay_ms(delay_ms):
+    start = time.ticks_ms()
+    while time.ticks_diff(time.ticks_ms(), start) < delay_ms:
+        pass
+
+
+pulse_in = Pin(pulse_in_pin, Pin.IN, Pin.PULL_DOWN)
+ack_out = Pin(ack_out_pin, Pin.OUT)
+ack_out.low()
+
+width = 0
+
+# Send begin ack to start generating pulse
+ack_out.high()
+
+# Measure the pulse width
+width = time_pulse_us(pulse_in, 1, 10000000)
+
+print(
+    f"Pulse timing verified: {True if (0.98 < (width / 1000000) < 1.2) else 'False, width=' + str(width / 1000000)}"
+)
+
+# Deinitialize the pins
+pulse_in.deinit()
+ack_out.deinit()
diff --git a/tests/ports/psoc6/board_ext_hw/multi/time_pulse_us.py.exp b/tests/ports/psoc6/board_ext_hw/multi/time_pulse_us.py.exp
new file mode 100644
index 0000000000000..d0daee6841902
--- /dev/null
+++ b/tests/ports/psoc6/board_ext_hw/multi/time_pulse_us.py.exp
@@ -0,0 +1 @@
+Pulse timing verified: True
diff --git a/tests/ports/psoc6/run_psoc6_tests.sh b/tests/ports/psoc6/run_psoc6_tests.sh
index de184dd7ba3b8..8185545c72764 100755
--- a/tests/ports/psoc6/run_psoc6_tests.sh
+++ b/tests/ports/psoc6/run_psoc6_tests.sh
@@ -41,6 +41,7 @@ usage() {
   echo "  pdm_pcm           run pdm_pcm tests"
   echo "  bitstream         run bitstream tests"
   echo "  watchdog          run watchdog tests"
+  echo "  time_pulse        run time_pulse test"
   echo "  multi-instance    run multiple board instances tests"
   echo "  help              display this help"
   echo
@@ -218,6 +219,7 @@ i2c_tests() {
   run_tests "i2c" ${dev_test} "${tests_psoc6_dir}/board_ext_hw/single/i2c.py"
 }
 
+
 uart_tests() {
   run_tests "uart" ${dev_test} "${tests_psoc6_dir}/board_ext_hw/single/uart.py"
 }
@@ -237,6 +239,11 @@ i2s_tests() {
   "" "i2s_tx" ${dev_stub} "${tests_psoc6_dir}/board_ext_hw/multi/i2s_tx.py"
 }
 
+time_pulse_tests() {
+  run_tests "time_pulse" ${dev_test} "${tests_psoc6_dir}/board_ext_hw/multi/time_pulse_us.py" \
+  "" "time_pulse_sig_gen" ${dev_stub} "${tests_psoc6_dir}/board_ext_hw/multi/time_pulse_sig_gen.py"
+}
+
 pdm_pcm_tests() {
   run_tests "pdm_pcm" ${dev_test} "${tests_psoc6_dir}/board_ext_hw/multi/pdm_pcm_rx.py" \
   "" "pdm_pcm_tx" ${dev_stub} "${tests_psoc6_dir}/board_ext_hw/multi/pdm_pcm_tx.py"
@@ -301,7 +308,7 @@ run_ci_tests() {
 
     dev_test=${devs_a[0]}
     pwm_tests
-
+    
     if [ "${board}" == "CY8CPROTO-062-4343W" ] || [ "${board}" == "CY8CPROTO-063-BLE" ]; then
       dev_test=${devs_a[0]} 
     else
@@ -351,6 +358,7 @@ run_ci_tests() {
     fi
     i2s_tests
 
+
     if [ "${board}" == "CY8CPROTO-062-4343W" ] || [ "${board}" == "CY8CPROTO-063-BLE" ]; then
       dev_test=${devs_b[0]}
       dev_stub=${devs_a[0]}
@@ -366,13 +374,15 @@ run_ci_tests() {
       dev_test=${devs_a[0]}
       dev_stub=${devs_b[0]}
       bitstream_tests
-     #else
-     #  if [ "${board}" == "CY8CKIT-062S2-AI" ]; then
-     #   dev_test=${devs_c[0]}
-     #    dev_stub=${devs_b[0]}
-     #  fi
+    else
+      if [ "${board}" == "CY8CKIT-062S2-AI" ]; then
+        dev_test=${devs_b[0]}
+        dev_stub=${devs_c[0]}
+      fi
     fi
-     # bitstream_tests
+    # TODO:Enable this 2 test properly in the HIL!
+    # bitstream_tests
+    #time_pulse_tests
 
     dev_test=${devs[0]}
     wdt_tests
@@ -419,6 +429,9 @@ case ${test_suite} in
     "i2s")
         i2s_tests
         ;;
+    "time_pulse")
+        time_pulse_tests
+        ;;
     "pdm_pcm")
         pdm_pcm_tests
         ;;