Merge branches 'clk-socfpga', 'clk-renesas', 'clk-cleanup', 'clk-samsung' and 'clk-mediatek' into clk-next

* clk-socfpga:
  clk: socfpga: agilex5: add clock driver for Agilex5

* clk-renesas: (35 commits)
  clk: renesas: r9a09g077: Add SPI module clocks
  clk: renesas: r9a09g056: Add USB3.0 clocks/resets
  clk: renesas: r9a09g057: Add USB3.0 clocks/resets
  clk: renesas: r9a09g047: Add RSCI clocks/resets
  dt-bindings: clock: renesas,r9a09g056-cpg: Add USB3.0 core clocks
  dt-bindings: clock: renesas,r9a09g057-cpg: Add USB3.0 core clocks
  clk: renesas: r9a06g032: Fix memory leak in error path
  clk: renesas: r9a09g077: Use devm_ helpers for divider clock registration
  clk: renesas: r9a09g077: Remove stray blank line
  clk: renesas: r9a09g077: Propagate rate changes to parent clocks
  clk: renesas: r8a779a0: Add 3DGE module clock
  clk: renesas: r8a779a0: Add ZG Core clock
  clk: renesas: rcar-gen4: Add support for clock dividers in FRQCRB
  dt-bindings: clock: r8a779a0: Add ZG core clock
  clk: renesas: r9a09g056: Add clock and reset entries for ISP
  clk: renesas: r9a09g056: Add support for PLLVDO, CRU clocks, and resets
  clk: renesas: r9a09g056: Add clocks and resets for DSI and LCDC modules
  clk: renesas: r9a09g077: Add TSU module clock
  clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC
  clk: renesas: rzv2h: Add support for DSI clocks
  ...

* clk-cleanup:
  clk: keystone: fix compile testing
  clk: keystone: syscon-clk: fix regmap leak on probe failure
  clk: samsung: exynos-clkout: Assign .num before accessing .hws
  clk: actions: Fix discarding const qualifier by 'container_of' macro
  clk: spacemit: Set clk_hw_onecell_data::num before using flex array
  clk: spacemit: fix comment typo
  clk: keystone: Fix discarded const qualifiers
  clk: sprd: sc9860: Simplify with of_device_get_match_data()

* clk-samsung:
  firmware: exynos-acpm: add empty method to allow compile test
  MAINTAINERS: add ACPM clock bindings and driver
  clk: samsung: add Exynos ACPM clock driver
  firmware: exynos-acpm: register ACPM clocks pdev
  firmware: exynos-acpm: add DVFS protocol
  dt-bindings: firmware: google,gs101-acpm-ipc: add ACPM clocks
  clk: samsung: clk-pll: simplify samsung_pll_lock_wait()
  clk: samsung: exynosautov920: add block mfc clock support
  clk: samsung: exynosautov920: add clock support
  dt-bindings: clock: exynosautov920: add mfc clock definitions
  dt-bindings: clock: exynosautov920: add m2m clock definitions
  dt-bindings: clock: google,gs101-clock: add power-domains

* clk-mediatek:
  clk: en7523: Add reset-controller support for EN7523 SoC
  dt-bindings: clock: airoha: Add reset support to EN7523 clock binding

Author: bebarino

Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml

@@ -64,8 +64,6 @@ allOf:
         reg:
           minItems: 2
 
-        '#reset-cells': false
-
   - if:
       properties:
         compatible:
@@ -85,6 +83,7 @@ examples:
       reg = <0x1fa20000 0x400>,
             <0x1fb00000 0x1000>;
       #clock-cells = <1>;
+      #reset-cells = <1>;
     };
 
   - |

Documentation/devicetree/bindings/clock/google,gs101-clock.yaml

@@ -46,6 +46,9 @@ properties:
   "#clock-cells":
     const: 1
 
+  power-domains:
+    maxItems: 1
+
   reg:
     maxItems: 1
 

Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml

@@ -38,6 +38,8 @@ properties:
       - samsung,exynosautov920-cmu-hsi0
       - samsung,exynosautov920-cmu-hsi1
       - samsung,exynosautov920-cmu-hsi2
+      - samsung,exynosautov920-cmu-m2m
+      - samsung,exynosautov920-cmu-mfc
       - samsung,exynosautov920-cmu-misc
       - samsung,exynosautov920-cmu-peric0
       - samsung,exynosautov920-cmu-peric1
@@ -226,6 +228,46 @@ allOf:
             - const: embd
             - const: ethernet
 
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov920-cmu-m2m
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (38.4 MHz)
+            - description: CMU_M2M NOC clock (from CMU_TOP)
+            - description: CMU_M2M JPEG clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: noc
+            - const: jpeg
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: samsung,exynosautov920-cmu-mfc
+
+    then:
+      properties:
+        clocks:
+          items:
+            - description: External reference clock (38.4 MHz)
+            - description: CMU_MFC MFC clock (from CMU_TOP)
+            - description: CMU_MFC WFD clock (from CMU_TOP)
+
+        clock-names:
+          items:
+            - const: oscclk
+            - const: mfc
+            - const: wfd
+
 required:
   - compatible
   - "#clock-cells"

Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml

@@ -24,6 +24,15 @@ properties:
   compatible:
     const: google,gs101-acpm-ipc
 
+  "#clock-cells":
+    const: 1
+    description:
+      Clocks that are variable and index based. These clocks don't provide
+      an entire range of values between the limits but only discrete points
+      within the range. The firmware also manages the voltage scaling
+      appropriately with the clock scaling. The argument is the ID of the
+      clock contained by the firmware messages.
+
   mboxes:
     maxItems: 1
 
@@ -45,6 +54,7 @@ properties:
 
 required:
   - compatible
+  - "#clock-cells"
   - mboxes
   - shmem
 
@@ -56,6 +66,7 @@ examples:
 
     power-management {
         compatible = "google,gs101-acpm-ipc";
+        #clock-cells = <1>;
         mboxes = <&ap2apm_mailbox>;
         shmem = <&apm_sram>;
 

MAINTAINERS

@@ -10601,7 +10601,7 @@ F:	Documentation/devicetree/bindings/soc/google/google,gs101-pmu-intr-gen.yaml
 F:	arch/arm64/boot/dts/exynos/google/
 F:	drivers/clk/samsung/clk-gs101.c
 F:	drivers/phy/samsung/phy-gs101-ufs.c
-F:	include/dt-bindings/clock/google,gs101.h
+F:	include/dt-bindings/clock/google,gs101*
 K:	[gG]oogle.?[tT]ensor
 
 GPD FAN DRIVER
@@ -22761,6 +22761,7 @@ L:	linux-kernel@vger.kernel.org
 L:	linux-samsung-soc@vger.kernel.org
 S:	Supported
 F:	Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
+F:	drivers/clk/samsung/clk-acpm.c
 F:	drivers/firmware/samsung/exynos-acpm*
 F:	include/linux/firmware/samsung/exynos-acpm-protocol.h
 

drivers/clk/Makefile

@@ -125,8 +125,7 @@ obj-$(CONFIG_ARCH_HISI)			+= hisilicon/
 obj-y					+= imgtec/
 obj-y					+= imx/
 obj-y					+= ingenic/
-obj-$(CONFIG_ARCH_K3)			+= keystone/
-obj-$(CONFIG_ARCH_KEYSTONE)		+= keystone/
+obj-y					+= keystone/
 obj-y					+= mediatek/
 obj-$(CONFIG_ARCH_MESON)		+= meson/
 obj-y					+= microchip/

drivers/clk/actions/owl-common.h

@@ -32,7 +32,7 @@ struct owl_clk_desc {
 };
 
 static inline struct owl_clk_common *
-	hw_to_owl_clk_common(const struct clk_hw *hw)
+	hw_to_owl_clk_common(struct clk_hw *hw)
 {
 	return container_of(hw, struct owl_clk_common, hw);
 }

drivers/clk/actions/owl-composite.h

@@ -108,7 +108,7 @@ struct owl_composite {
 		},							\
 	}
 
-static inline struct owl_composite *hw_to_owl_comp(const struct clk_hw *hw)
+static inline struct owl_composite *hw_to_owl_comp(struct clk_hw *hw)
 {
 	struct owl_clk_common *common = hw_to_owl_clk_common(hw);
 

drivers/clk/actions/owl-divider.h

@@ -49,7 +49,7 @@ struct owl_divider {
 		},							\
 	}
 
-static inline struct owl_divider *hw_to_owl_divider(const struct clk_hw *hw)
+static inline struct owl_divider *hw_to_owl_divider(struct clk_hw *hw)
 {
 	struct owl_clk_common *common = hw_to_owl_clk_common(hw);
 

drivers/clk/actions/owl-factor.h

@@ -57,7 +57,7 @@ struct owl_factor {
 
 #define div_mask(d) ((1 << ((d)->width)) - 1)
 
-static inline struct owl_factor *hw_to_owl_factor(const struct clk_hw *hw)
+static inline struct owl_factor *hw_to_owl_factor(struct clk_hw *hw)
 {
 	struct owl_clk_common *common = hw_to_owl_clk_common(hw);