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AaronDotgregkh
AaronDot
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serial: 8250: Add Loongson uart driver support
Add the driver for on-chip UART used on Loongson family chips. The hardware is similar to NS16550A, but there are the following differences: - Some chips (such as Loongson-2K2000) have added a fractional division register to obtain the required baud rate accurately, so the {get,set}_divisor callback is overridden. - Due to hardware defects, quirk handling is required for UART_MCR/UART_MSR. Co-developed-by: Haowei Zheng <zhenghaowei@loongson.cn> Signed-off-by: Haowei Zheng <zhenghaowei@loongson.cn> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Link: https://patch.msgid.link/2c2a01a276b9250efea0c7aa190efecdfd6fdf5a.1760166651.git.zhoubinbin@loongson.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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‎drivers/tty/serial/8250/8250_loongson.c‎

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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Serial Port driver for Loongson family chips
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*
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* Copyright (C) 2020-2025 Loongson Technology Corporation Limited
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/clk.h>
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/property.h>
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#include <linux/math.h>
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#include <linux/mod_devicetable.h>
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#include <linux/pm.h>
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#include <linux/reset.h>
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#include "8250.h"
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/* Divisor Latch Fraction Register */
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#define LOONGSON_UART_DLF 0x2
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#define LOONGSON_QUOT_FRAC_MASK GENMASK(7, 0)
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#define LOONGSON_QUOT_DIV_MASK GENMASK(15, 8)
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struct loongson_uart_ddata {
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bool has_frac;
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u8 mcr_invert;
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u8 msr_invert;
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};
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static const struct loongson_uart_ddata ls2k0500_uart_data = {
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.has_frac = false,
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.mcr_invert = UART_MCR_RTS | UART_MCR_DTR,
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.msr_invert = UART_MSR_CTS | UART_MSR_DSR,
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};
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static const struct loongson_uart_ddata ls2k1500_uart_data = {
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.has_frac = true,
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.mcr_invert = UART_MCR_RTS | UART_MCR_DTR,
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.msr_invert = 0,
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};
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struct loongson_uart_priv {
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int line;
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struct clk *clk;
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struct resource *res;
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struct reset_control *rst;
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const struct loongson_uart_ddata *ddata;
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};
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static u8 serial_fixup(struct uart_port *p, unsigned int offset, u8 val)
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{
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struct loongson_uart_priv *priv = p->private_data;
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switch (offset) {
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case UART_MCR:
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return val ^ priv->ddata->mcr_invert;
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case UART_MSR:
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return val ^ priv->ddata->msr_invert;
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default:
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return val;
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}
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}
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static u32 loongson_serial_in(struct uart_port *p, unsigned int offset)
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{
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u8 val;
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val = readb(p->membase + (offset << p->regshift));
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return serial_fixup(p, offset, val);
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}
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static void loongson_serial_out(struct uart_port *p, unsigned int offset, unsigned int value)
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{
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u8 val;
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offset <<= p->regshift;
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val = serial_fixup(p, offset, value);
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writeb(val, p->membase + offset);
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}
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static unsigned int loongson_frac_get_divisor(struct uart_port *port, unsigned int baud,
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unsigned int *frac)
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{
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unsigned int quot;
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quot = DIV_ROUND_CLOSEST((port->uartclk << 4), baud);
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*frac = FIELD_GET(LOONGSON_QUOT_FRAC_MASK, quot);
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return FIELD_GET(LOONGSON_QUOT_DIV_MASK, quot);
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}
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static void loongson_frac_set_divisor(struct uart_port *port, unsigned int baud,
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unsigned int quot, unsigned int quot_frac)
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{
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struct uart_8250_port *up = up_to_u8250p(port);
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serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
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serial_dl_write(up, quot);
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serial_port_out(port, LOONGSON_UART_DLF, quot_frac);
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}
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static int loongson_uart_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct uart_8250_port uart = {};
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struct loongson_uart_priv *priv;
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struct uart_port *port;
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int ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->ddata = device_get_match_data(dev);
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port = &uart.port;
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spin_lock_init(&port->lock);
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port->flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_IOREMAP;
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port->iotype = UPIO_MEM;
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port->regshift = 0;
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port->dev = dev;
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port->type = PORT_16550A;
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port->private_data = priv;
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port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &priv->res);
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if (!port->membase)
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return -ENOMEM;
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port->mapbase = priv->res->start;
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port->mapsize = resource_size(priv->res);
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port->serial_in = loongson_serial_in;
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port->serial_out = loongson_serial_out;
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if (priv->ddata->has_frac) {
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port->get_divisor = loongson_frac_get_divisor;
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port->set_divisor = loongson_frac_set_divisor;
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}
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ret = uart_read_port_properties(port);
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if (ret)
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return ret;
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if (!port->uartclk) {
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priv->clk = devm_clk_get_enabled(dev, NULL);
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if (IS_ERR(priv->clk))
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return dev_err_probe(dev, PTR_ERR(priv->clk),
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"Unable to determine clock frequency!\n");
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port->uartclk = clk_get_rate(priv->clk);
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}
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priv->rst = devm_reset_control_get_optional_shared(dev, NULL);
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if (IS_ERR(priv->rst))
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return PTR_ERR(priv->rst);
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ret = reset_control_deassert(priv->rst);
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if (ret)
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return ret;
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ret = serial8250_register_8250_port(&uart);
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if (ret < 0) {
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reset_control_assert(priv->rst);
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return ret;
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}
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priv->line = ret;
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platform_set_drvdata(pdev, priv);
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return 0;
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}
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static void loongson_uart_remove(struct platform_device *pdev)
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{
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struct loongson_uart_priv *priv = platform_get_drvdata(pdev);
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serial8250_unregister_port(priv->line);
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reset_control_assert(priv->rst);
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}
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static int loongson_uart_suspend(struct device *dev)
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{
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struct loongson_uart_priv *priv = dev_get_drvdata(dev);
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struct uart_8250_port *up = serial8250_get_port(priv->line);
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serial8250_suspend_port(priv->line);
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if (!uart_console(&up->port) || console_suspend_enabled)
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clk_disable_unprepare(priv->clk);
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return 0;
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}
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static int loongson_uart_resume(struct device *dev)
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{
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struct loongson_uart_priv *priv = dev_get_drvdata(dev);
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struct uart_8250_port *up = serial8250_get_port(priv->line);
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int ret;
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if (!uart_console(&up->port) || console_suspend_enabled) {
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ret = clk_prepare_enable(priv->clk);
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if (ret)
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return ret;
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}
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serial8250_resume_port(priv->line);
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return 0;
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}
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static DEFINE_SIMPLE_DEV_PM_OPS(loongson_uart_pm_ops, loongson_uart_suspend,
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loongson_uart_resume);
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static const struct of_device_id loongson_uart_of_ids[] = {
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{ .compatible = "loongson,ls2k0500-uart", .data = &ls2k0500_uart_data },
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{ .compatible = "loongson,ls2k1500-uart", .data = &ls2k1500_uart_data },
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{ },
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};
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MODULE_DEVICE_TABLE(of, loongson_uart_of_ids);
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static struct platform_driver loongson_uart_driver = {
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.probe = loongson_uart_probe,
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.remove = loongson_uart_remove,
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.driver = {
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.name = "loongson-uart",
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.pm = pm_ptr(&loongson_uart_pm_ops),
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.of_match_table = loongson_uart_of_ids,
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},
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};
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module_platform_driver(loongson_uart_driver);
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MODULE_DESCRIPTION("Loongson UART driver");
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MODULE_AUTHOR("Loongson Technology Corporation Limited.");
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MODULE_LICENSE("GPL");

‎drivers/tty/serial/8250/Kconfig‎

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not booting kernel because the serial console remains silent in case
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they forgot to update the command line.
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config SERIAL_8250_LOONGSON
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tristate "Loongson 8250 based serial port"
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depends on SERIAL_8250
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depends on LOONGARCH || COMPILE_TEST
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help
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If you have a machine based on LoongArch CPU you can enable
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its onboard serial ports by enabling this option. The option
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is applicable to both devicetree and ACPI, say Y to this option.
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If unsure, say N.
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config SERIAL_8250_LPC18XX
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tristate "NXP LPC18xx/43xx serial port support"
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depends on SERIAL_8250 && OF && (ARCH_LPC18XX || COMPILE_TEST)

‎drivers/tty/serial/8250/Makefile‎

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obj-$(CONFIG_SERIAL_8250_INGENIC) += 8250_ingenic.o
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obj-$(CONFIG_SERIAL_8250_IOC3) += 8250_ioc3.o
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obj-$(CONFIG_SERIAL_8250_KEBA) += 8250_keba.o
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obj-$(CONFIG_SERIAL_8250_LOONGSON) += 8250_loongson.o
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obj-$(CONFIG_SERIAL_8250_LPC18XX) += 8250_lpc18xx.o
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obj-$(CONFIG_SERIAL_8250_LPSS) += 8250_lpss.o
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obj-$(CONFIG_SERIAL_8250_MEN_MCB) += 8250_men_mcb.o

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