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YaXing-Guogregkh
YaXing-Guo
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uio: Add SVA support for PCI devices via uio_pci_generic_sva.c
This patch introduces a new UIO driver, uio_pci_generic_sva, which extends the functionality of uio_pci_generic by adding support for Shared Virtual Addressing (SVA) when IOMMU is enabled in the system. The key enhancement allows PCI devices to directly use user-space virtual addresses for DMA operations, eliminating the need for bounce buffers or explicit IOVA mapping. This is achieved by leveraging the kernel's IOMMU-SVA subsystem, including process address space attachment, page fault handling, and shared context management between CPU and device. With this driver, userspace applications can perform zero-copy DMA using native pointers: void *addr = malloc(N); set_dma_addr((uint64_t)addr); // Passing user VA directly start_dma(); The device can now access 'addr' through the IOMMU's PASID-based translation, provided that the underlying IOMMU hardware (e.g., Intel VT-d 3.1+, AMD-Vi, ARM SMMU, RISCV IOMMU) and platform support SVA. Dependencies: - CONFIG_IOMMU_SVA must be enabled. - The platform must support PRI (Page Request Interface) and PASID. - Device drivers/userspace must handle page faults if demand-paging is used. The implementation reuses core logic from uio_pci_generic.c while adding PASID setting, and integration with the IOMMU SVA APIs. Also, add a read-only sysfs attribute 'pasid' to expose the Process Address Space ID assigned by IOMMU driver when binding an SVA-enabled device. For details, refer to the ABI documentation for uio_pci_sva driver sysfs attribute (Documentation/ABI/testing/sysfs-driver-uio_pci_sva-pasid). Signed-off-by: Yaxing Guo <guoyaxing@bosc.ac.cn> Link: https://patch.msgid.link/20250926095828.506-1-guoyaxing@bosc.ac.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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‎Documentation/ABI/testing/sysfs-driver-uio_pci_sva-pasid‎

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What: /sys/bus/pci/drivers/uio_pci_sva/<pci_dev>/pasid
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Date: September 2025
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Contact: Yaxing Guo <guoyaxing@bosc.ac.cn>
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Description:
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Process Address Space ID (PASID) assigned by IOMMU driver to
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the device for use with Shared Virtual Addressing (SVA).
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This read-only attribute exposes the PASID (A 20-bit identifier
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used in PCIe Address Translation Services and iommu table walks)
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allocated by the IOMMU driver during sva device binding.
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User-space UIO applications must read this attribute to obtain
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the PASID and program it into the device's configuration registers.
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This enables the device to perform DMA using user-space virtual
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address, with address translation handled by IOMMU.
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UIO User-space applications must:
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- Opening device and Mapping the device's register space via /dev/uioX
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(This triggers the IOMMU driver to allocate the PASID)
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- Reading the PASID from sysfs
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- Writing the PASID to a device-specific register (with example offset)
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The code may be like:
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map = mmap(..., "/dev/uio0", ...);
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f = fopen("/sys/.../pasid", "r");
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fscanf(f, "%d", &pasid);
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map[REG_PASID_OFFSET] = pasid;

‎drivers/uio/Kconfig‎

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@@ -164,4 +164,16 @@ config UIO_DFL
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opae-sdk/tools/libopaeuio/
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If you compile this as a module, it will be called uio_dfl.
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config UIO_PCI_GENERIC_SVA
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tristate "Generic driver for PCI Express that supports sva"
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depends on PCI && IOMMU_SVA
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help
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Userspace I/O driver for PCI devices that support Shared Virtual
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Addressing (SVA), enabling direct use of user-space virtual
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addresses in device DMA operations via IOMMU hardware.
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This driver binds to PCI devices and exposes them to userspace
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via the UIO framework.
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endif

‎drivers/uio/Makefile‎

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@@ -11,3 +11,4 @@ obj-$(CONFIG_UIO_MF624) += uio_mf624.o
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obj-$(CONFIG_UIO_FSL_ELBC_GPCM) += uio_fsl_elbc_gpcm.o
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obj-$(CONFIG_UIO_HV_GENERIC) += uio_hv_generic.o
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obj-$(CONFIG_UIO_DFL) += uio_dfl.o
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obj-$(CONFIG_UIO_PCI_GENERIC_SVA) += uio_pci_generic_sva.o

‎drivers/uio/uio_pci_generic_sva.c‎

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// SPDX-License-Identifier: GPL-2.0
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/*
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* UIO PCI Express sva driver
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*
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* Copyright (c) 2025 Beijing Institute of Open Source Chip (BOSC)
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*/
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/uio_driver.h>
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#include <linux/iommu.h>
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struct uio_pci_sva_dev {
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struct pci_dev *pdev;
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struct uio_info info;
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struct iommu_sva *sva_handle;
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int pasid;
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};
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static irqreturn_t irq_handler(int irq, struct uio_info *dev_info)
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{
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return IRQ_HANDLED;
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}
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static int uio_pci_sva_open(struct uio_info *info, struct inode *inode)
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{
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struct iommu_sva *handle;
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struct uio_pci_sva_dev *udev = info->priv;
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struct iommu_domain *domain;
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if (!udev && !udev->pdev)
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return -ENODEV;
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domain = iommu_get_domain_for_dev(&udev->pdev->dev);
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if (domain)
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iommu_detach_device(domain, &udev->pdev->dev);
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handle = iommu_sva_bind_device(&udev->pdev->dev, current->mm);
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if (IS_ERR(handle))
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return -EINVAL;
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udev->pasid = iommu_sva_get_pasid(handle);
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udev->sva_handle = handle;
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return 0;
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}
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static int uio_pci_sva_release(struct uio_info *info, struct inode *inode)
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{
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struct uio_pci_sva_dev *udev = info->priv;
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if (!udev && !udev->pdev)
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return -ENODEV;
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iommu_sva_unbind_device(udev->sva_handle);
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return 0;
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}
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static int probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct uio_pci_sva_dev *udev;
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int ret, i, irq = 0;
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ret = pci_enable_device(pdev);
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if (ret) {
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dev_err(&pdev->dev, "pci_enable_device failed: %d\n", ret);
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return ret;
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}
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ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
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if (ret)
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goto out_disable;
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pci_set_master(pdev);
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ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_MSIX | PCI_IRQ_MSI);
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if (ret > 0) {
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irq = pci_irq_vector(pdev, 0);
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if (irq < 0) {
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dev_err(&pdev->dev, "Failed to get MSI vector\n");
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ret = irq;
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goto out_disable;
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}
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} else
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dev_warn(&pdev->dev,
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"No IRQ vectors available (%d), using polling\n", ret);
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udev = devm_kzalloc(&pdev->dev, sizeof(struct uio_pci_sva_dev),
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GFP_KERNEL);
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if (!udev) {
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ret = -ENOMEM;
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goto out_disable;
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}
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udev->pdev = pdev;
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udev->info.name = "uio_pci_sva";
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udev->info.version = "0.0.1";
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udev->info.open = uio_pci_sva_open;
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udev->info.release = uio_pci_sva_release;
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udev->info.irq = irq;
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udev->info.handler = irq_handler;
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udev->info.priv = udev;
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for (i = 0; i < MAX_UIO_MAPS; i++) {
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struct resource *r = &pdev->resource[i];
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struct uio_mem *uiomem = &udev->info.mem[i];
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if (r->flags != (IORESOURCE_SIZEALIGN | IORESOURCE_MEM))
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continue;
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if (uiomem >= &udev->info.mem[MAX_UIO_MAPS]) {
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dev_warn(&pdev->dev, "Do not support more than %d iomem\n",
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MAX_UIO_MAPS);
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break;
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}
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uiomem->memtype = UIO_MEM_PHYS;
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uiomem->addr = r->start & PAGE_MASK;
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uiomem->offs = r->start & ~PAGE_MASK;
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uiomem->size =
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(uiomem->offs + resource_size(r) + PAGE_SIZE - 1) &
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PAGE_MASK;
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uiomem->name = r->name;
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}
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ret = devm_uio_register_device(&pdev->dev, &udev->info);
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if (ret) {
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dev_err(&pdev->dev, "Failed to register uio device\n");
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goto out_free;
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}
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pci_set_drvdata(pdev, udev);
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return 0;
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out_free:
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kfree(udev);
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out_disable:
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pci_disable_device(pdev);
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return ret;
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}
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static void remove(struct pci_dev *pdev)
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{
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struct uio_pci_sva_dev *udev = pci_get_drvdata(pdev);
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pci_release_regions(pdev);
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pci_disable_device(pdev);
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kfree(udev);
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}
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static ssize_t pasid_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct uio_pci_sva_dev *udev = pci_get_drvdata(pdev);
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return sysfs_emit(buf, "%d\n", udev->pasid);
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}
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static DEVICE_ATTR_RO(pasid);
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static struct attribute *uio_pci_sva_attrs[] = {
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&dev_attr_pasid.attr,
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NULL
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};
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static const struct attribute_group uio_pci_sva_attr_group = {
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.attrs = uio_pci_sva_attrs,
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};
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static const struct attribute_group *uio_pci_sva_attr_groups[] = {
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&uio_pci_sva_attr_group,
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NULL
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};
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static struct pci_driver uio_pci_generic_sva_driver = {
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.name = "uio_pci_sva",
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.dev_groups = uio_pci_sva_attr_groups,
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.id_table = NULL,
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.probe = probe,
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.remove = remove,
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};
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module_pci_driver(uio_pci_generic_sva_driver);
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MODULE_VERSION("0.0.01");
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Yaxing Guo <guoyaxing@bosc.ac.cn>");
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MODULE_DESCRIPTION("Generic UIO sva driver for PCI");

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