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crypto/ccp: Implement SEV-TIO PCIe IDE (phase1)
Implement the SEV-TIO (Trusted I/O) firmware interface for PCIe TDISP (Trust Domain In-Socket Protocol). This enables secure communication between trusted domains and PCIe devices through the PSP (Platform Security Processor). The implementation includes: - Device Security Manager (DSM) operations for establishing secure links - SPDM (Security Protocol and Data Model) over DOE (Data Object Exchange) - IDE (Integrity Data Encryption) stream management for secure PCIe This module bridges the SEV firmware stack with the generic PCIe TSM framework. This is phase1 as described in Documentation/driver-api/pci/tsm.rst. On AMD SEV, the AMD PSP firmware acts as TSM (manages the security/trust). The CCP driver provides the interface to it and registers in the TSM subsystem. Detect the PSP support (reported via FEATURE_INFO + SNP_PLATFORM_STATUS) and enable SEV-TIO in the SNP_INIT_EX call if the hardware supports TIO. Implement SEV TIO PSP command wrappers in sev-dev-tio.c and store the data in the SEV-TIO-specific structs. Implement TSM hooks and IDE setup in sev-dev-tsm.c. Signed-off-by: Alexey Kardashevskiy <aik@amd.com> Link: https://patch.msgid.link/692f506bb80c9_261c11004@dwillia2-mobl4.notmuch Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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drivers/crypto/ccp/Kconfig

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@@ -39,6 +39,7 @@ config CRYPTO_DEV_SP_PSP
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bool "Platform Security Processor (PSP) device"
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default y
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depends on CRYPTO_DEV_CCP_DD && X86_64 && AMD_IOMMU
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select PCI_TSM
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help
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Provide support for the AMD Platform Security Processor (PSP).
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The PSP is a dedicated processor that provides support for key

drivers/crypto/ccp/Makefile

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@@ -16,6 +16,10 @@ ccp-$(CONFIG_CRYPTO_DEV_SP_PSP) += psp-dev.o \
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hsti.o \
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sfs.o
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ifeq ($(CONFIG_PCI_TSM),y)
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ccp-$(CONFIG_CRYPTO_DEV_SP_PSP) += sev-dev-tsm.o sev-dev-tio.o
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endif
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obj-$(CONFIG_CRYPTO_DEV_CCP_CRYPTO) += ccp-crypto.o
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ccp-crypto-objs := ccp-crypto-main.o \
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ccp-crypto-aes.o \

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