Skip to content

Commit 8dc7ab6

Browse files
clamor-sgregkh
authored andcommitted
usb: phy: tegra: parametrize HSIC PTS value
The parallel transceiver select used in HSIC mode differs on Tegra20, where it uses the UTMI value (0), whereas Tegra30+ uses a dedicated HSIC value. Reflect this in the SoC config. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Link: https://patch.msgid.link/20260202080526.23487-4-clamor95@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1 parent a7abf50 commit 8dc7ab6

2 files changed

Lines changed: 5 additions & 4 deletions

File tree

drivers/usb/phy/phy-tegra-usb.c

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -957,10 +957,7 @@ static int uhsic_phy_power_on(struct tegra_usb_phy *phy)
957957
writel_relaxed(val, base + USB_USBMODE);
958958
}
959959

960-
if (phy->soc_config->has_hostpc)
961-
set_pts(phy, TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC);
962-
else
963-
set_pts(phy, 0);
960+
set_pts(phy, phy->soc_config->uhsic_pts_value);
964961

965962
val = readl_relaxed(base + USB_TXFILLTUNING);
966963
if ((val & USB_FIFO_TXFILL_MASK) != USB_FIFO_TXFILL_THRES(0x10)) {
@@ -1474,6 +1471,7 @@ static const struct tegra_phy_soc_config tegra20_soc_config = {
14741471
.requires_pmc_ao_power_up = false,
14751472
.uhsic_registers_offset = 0,
14761473
.uhsic_tx_rtune = 0, /* 40 ohm */
1474+
.uhsic_pts_value = 0, /* UTMI */
14771475
};
14781476

14791477
static const struct tegra_phy_soc_config tegra30_soc_config = {
@@ -1484,6 +1482,7 @@ static const struct tegra_phy_soc_config tegra30_soc_config = {
14841482
.requires_pmc_ao_power_up = true,
14851483
.uhsic_registers_offset = 0x400,
14861484
.uhsic_tx_rtune = 8, /* 50 ohm */
1485+
.uhsic_pts_value = TEGRA_USB_HOSTPC1_DEVLC_PTS_HSIC,
14871486
};
14881487

14891488
static const struct of_device_id tegra_usb_phy_id_table[] = {

include/linux/usb/tegra_usb_phy.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ struct gpio_desc;
2626
* uhsic_registers_offset: for Tegra30+ where HSIC registers were offset
2727
* comparing to Tegra20 by 0x400, since Tegra20 has no UTMIP on PHY2
2828
* uhsic_tx_rtune: fine tuned 50 Ohm termination resistor for NMOS/PMOS driver
29+
* uhsic_pts_value: parallel transceiver select enumeration value
2930
*/
3031

3132
struct tegra_phy_soc_config {
@@ -36,6 +37,7 @@ struct tegra_phy_soc_config {
3637
bool requires_pmc_ao_power_up;
3738
u32 uhsic_registers_offset;
3839
u32 uhsic_tx_rtune;
40+
u32 uhsic_pts_value;
3941
};
4042

4143
struct tegra_utmip_config {

0 commit comments

Comments
 (0)