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airliedairlied
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Merge tag 'amd-drm-fixes-6.14-2025-02-26' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.14-2025-02-26: amdgpu: - Legacy dpm suspend/resume fix - Runtime PM fix for DELL G5 SE - MAINTAINERS updates - Enforce Isolation fixes - mailmap update - EDID reading i2c fix - PSR fix - eDP fix - HPD interrupt handling fix - Clear memory fix amdkfd: - MQD handling fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250226200342.3685347-1-alexander.deucher@amd.com
2 parents d082ecb + d3c7059 commit b06a731

19 files changed

Lines changed: 196 additions & 44 deletions

‎.mailmap‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -613,6 +613,8 @@ Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
613613
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
614614
Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org>
615615
Rocky Liao <quic_rjliao@quicinc.com> <rjliao@codeaurora.org>
616+
Rodrigo Siqueira <siqueira@igalia.com> <rodrigosiqueiramelo@gmail.com>
617+
Rodrigo Siqueira <siqueira@igalia.com> <Rodrigo.Siqueira@amd.com>
616618
Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com>
617619
Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com>
618620
Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru>

‎MAINTAINERS‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1046,14 +1046,14 @@ F: drivers/crypto/ccp/hsti.*
10461046
AMD DISPLAY CORE
10471047
M: Harry Wentland <harry.wentland@amd.com>
10481048
M: Leo Li <sunpeng.li@amd.com>
1049-
M: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
1049+
R: Rodrigo Siqueira <siqueira@igalia.com>
10501050
L: amd-gfx@lists.freedesktop.org
10511051
S: Supported
10521052
T: git https://gitlab.freedesktop.org/agd5f/linux.git
10531053
F: drivers/gpu/drm/amd/display/
10541054

10551055
AMD DISPLAY CORE - DML
1056-
M: Chaitanya Dhere <chaitanya.dhere@amd.com>
1056+
M: Austin Zheng <austin.zheng@amd.com>
10571057
M: Jun Lei <jun.lei@amd.com>
10581058
S: Supported
10591059
F: drivers/gpu/drm/amd/display/dc/dml/
@@ -19657,7 +19657,6 @@ F: drivers/net/wireless/quantenna
1965719657
RADEON and AMDGPU DRM DRIVERS
1965819658
M: Alex Deucher <alexander.deucher@amd.com>
1965919659
M: Christian König <christian.koenig@amd.com>
19660-
M: Xinhui Pan <Xinhui.Pan@amd.com>
1966119660
L: amd-gfx@lists.freedesktop.org
1966219661
S: Supported
1966319662
B: https://gitlab.freedesktop.org/drm/amd/-/issues

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1638,6 +1638,13 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev)
16381638
if (amdgpu_sriov_vf(adev))
16391639
return 0;
16401640

1641+
/* resizing on Dell G5 SE platforms causes problems with runtime pm */
1642+
if ((amdgpu_runtime_pm != 0) &&
1643+
adev->pdev->vendor == PCI_VENDOR_ID_ATI &&
1644+
adev->pdev->device == 0x731f &&
1645+
adev->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL)
1646+
return 0;
1647+
16411648
/* PCI_EXT_CAP_ID_VNDR extended capability is located at 0x100 */
16421649
if (!pci_find_ext_capability(adev->pdev, PCI_EXT_CAP_ID_VNDR))
16431650
DRM_WARN("System can't access extended configuration space, please check!!\n");

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c‎

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1638,22 +1638,19 @@ static ssize_t amdgpu_gfx_set_enforce_isolation(struct device *dev,
16381638
}
16391639

16401640
mutex_lock(&adev->enforce_isolation_mutex);
1641-
16421641
for (i = 0; i < num_partitions; i++) {
1643-
if (adev->enforce_isolation[i] && !partition_values[i]) {
1642+
if (adev->enforce_isolation[i] && !partition_values[i])
16441643
/* Going from enabled to disabled */
16451644
amdgpu_vmid_free_reserved(adev, AMDGPU_GFXHUB(i));
1646-
amdgpu_mes_set_enforce_isolation(adev, i, false);
1647-
} else if (!adev->enforce_isolation[i] && partition_values[i]) {
1645+
else if (!adev->enforce_isolation[i] && partition_values[i])
16481646
/* Going from disabled to enabled */
16491647
amdgpu_vmid_alloc_reserved(adev, AMDGPU_GFXHUB(i));
1650-
amdgpu_mes_set_enforce_isolation(adev, i, true);
1651-
}
16521648
adev->enforce_isolation[i] = partition_values[i];
16531649
}
1654-
16551650
mutex_unlock(&adev->enforce_isolation_mutex);
16561651

1652+
amdgpu_mes_update_enforce_isolation(adev);
1653+
16571654
return count;
16581655
}
16591656

‎drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c‎

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1681,7 +1681,8 @@ bool amdgpu_mes_suspend_resume_all_supported(struct amdgpu_device *adev)
16811681
}
16821682

16831683
/* Fix me -- node_id is used to identify the correct MES instances in the future */
1684-
int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev, uint32_t node_id, bool enable)
1684+
static int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev,
1685+
uint32_t node_id, bool enable)
16851686
{
16861687
struct mes_misc_op_input op_input = {0};
16871688
int r;
@@ -1703,6 +1704,23 @@ int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev, uint32_t node_i
17031704
return r;
17041705
}
17051706

1707+
int amdgpu_mes_update_enforce_isolation(struct amdgpu_device *adev)
1708+
{
1709+
int i, r = 0;
1710+
1711+
if (adev->enable_mes && adev->gfx.enable_cleaner_shader) {
1712+
mutex_lock(&adev->enforce_isolation_mutex);
1713+
for (i = 0; i < (adev->xcp_mgr ? adev->xcp_mgr->num_xcps : 1); i++) {
1714+
if (adev->enforce_isolation[i])
1715+
r |= amdgpu_mes_set_enforce_isolation(adev, i, true);
1716+
else
1717+
r |= amdgpu_mes_set_enforce_isolation(adev, i, false);
1718+
}
1719+
mutex_unlock(&adev->enforce_isolation_mutex);
1720+
}
1721+
return r;
1722+
}
1723+
17061724
#if defined(CONFIG_DEBUG_FS)
17071725

17081726
static int amdgpu_debugfs_mes_event_log_show(struct seq_file *m, void *unused)

‎drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -534,6 +534,6 @@ static inline void amdgpu_mes_unlock(struct amdgpu_mes *mes)
534534

535535
bool amdgpu_mes_suspend_resume_all_supported(struct amdgpu_device *adev);
536536

537-
int amdgpu_mes_set_enforce_isolation(struct amdgpu_device *adev, uint32_t node_id, bool enable);
537+
int amdgpu_mes_update_enforce_isolation(struct amdgpu_device *adev);
538538

539539
#endif /* __AMDGPU_MES_H__ */

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2281,7 +2281,7 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,
22812281
struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
22822282
struct amdgpu_res_cursor cursor;
22832283
u64 addr;
2284-
int r;
2284+
int r = 0;
22852285

22862286
if (!adev->mman.buffer_funcs_enabled)
22872287
return -EINVAL;

‎drivers/gpu/drm/amd/amdgpu/mes_v11_0.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1633,6 +1633,10 @@ static int mes_v11_0_hw_init(struct amdgpu_ip_block *ip_block)
16331633
goto failure;
16341634
}
16351635

1636+
r = amdgpu_mes_update_enforce_isolation(adev);
1637+
if (r)
1638+
goto failure;
1639+
16361640
out:
16371641
/*
16381642
* Disable KIQ ring usage from the driver once MES is enabled.

‎drivers/gpu/drm/amd/amdgpu/mes_v12_0.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1743,6 +1743,10 @@ static int mes_v12_0_hw_init(struct amdgpu_ip_block *ip_block)
17431743
goto failure;
17441744
}
17451745

1746+
r = amdgpu_mes_update_enforce_isolation(adev);
1747+
if (r)
1748+
goto failure;
1749+
17461750
out:
17471751
/*
17481752
* Disable KIQ ring usage from the driver once MES is enabled.

‎drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -107,6 +107,8 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
107107
m->cp_hqd_persistent_state = CP_HQD_PERSISTENT_STATE__PRELOAD_REQ_MASK |
108108
0x53 << CP_HQD_PERSISTENT_STATE__PRELOAD_SIZE__SHIFT;
109109

110+
m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT;
111+
m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__UNORD_DISPATCH_MASK;
110112
m->cp_mqd_control = 1 << CP_MQD_CONTROL__PRIV_STATE__SHIFT;
111113

112114
m->cp_mqd_base_addr_lo = lower_32_bits(addr);
@@ -167,10 +169,10 @@ static void update_mqd(struct mqd_manager *mm, void *mqd,
167169

168170
m = get_mqd(mqd);
169171

170-
m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT;
172+
m->cp_hqd_pq_control &= ~CP_HQD_PQ_CONTROL__QUEUE_SIZE_MASK;
171173
m->cp_hqd_pq_control |=
172174
ffs(q->queue_size / sizeof(unsigned int)) - 1 - 1;
173-
m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__UNORD_DISPATCH_MASK;
175+
174176
pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control);
175177

176178
m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);

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