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airliedairlied
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Merge tag 'amd-drm-fixes-6.0-2022-09-14' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.0-2022-09-14: amdgpu: - BACO fixes for some RDNA2 boards - PCI AER fixes uncovered by a core PCI change - Properly hook up dirtyfb helper - RAS fixes for GC 11.x - TMR fix - DCN 3.2.x fixes - DCN 3.1.4 fixes - LLVM DML stack size fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220914184030.6145-1-alexander.deucher@amd.com
2 parents 80e78fc + a867149 commit e2111ae

39 files changed

Lines changed: 595 additions & 834 deletions

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c‎

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2365,8 +2365,16 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
23652365
}
23662366
adev->ip_blocks[i].status.sw = true;
23672367

2368-
/* need to do gmc hw init early so we can allocate gpu mem */
2369-
if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {
2368+
if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_COMMON) {
2369+
/* need to do common hw init early so everything is set up for gmc */
2370+
r = adev->ip_blocks[i].version->funcs->hw_init((void *)adev);
2371+
if (r) {
2372+
DRM_ERROR("hw_init %d failed %d\n", i, r);
2373+
goto init_failed;
2374+
}
2375+
adev->ip_blocks[i].status.hw = true;
2376+
} else if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {
2377+
/* need to do gmc hw init early so we can allocate gpu mem */
23702378
/* Try to reserve bad pages early */
23712379
if (amdgpu_sriov_vf(adev))
23722380
amdgpu_virt_exchange_data(adev);
@@ -3052,8 +3060,8 @@ static int amdgpu_device_ip_reinit_early_sriov(struct amdgpu_device *adev)
30523060
int i, r;
30533061

30543062
static enum amd_ip_block_type ip_order[] = {
3055-
AMD_IP_BLOCK_TYPE_GMC,
30563063
AMD_IP_BLOCK_TYPE_COMMON,
3064+
AMD_IP_BLOCK_TYPE_GMC,
30573065
AMD_IP_BLOCK_TYPE_PSP,
30583066
AMD_IP_BLOCK_TYPE_IH,
30593067
};

‎drivers/gpu/drm/amd/amdgpu/amdgpu_display.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@
3838
#include <linux/pci.h>
3939
#include <linux/pm_runtime.h>
4040
#include <drm/drm_crtc_helper.h>
41+
#include <drm/drm_damage_helper.h>
4142
#include <drm/drm_edid.h>
4243
#include <drm/drm_gem_framebuffer_helper.h>
4344
#include <drm/drm_fb_helper.h>
@@ -496,6 +497,7 @@ bool amdgpu_display_ddc_probe(struct amdgpu_connector *amdgpu_connector,
496497
static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
497498
.destroy = drm_gem_fb_destroy,
498499
.create_handle = drm_gem_fb_create_handle,
500+
.dirty = drm_atomic_helper_dirtyfb,
499501
};
500502

501503
uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev,

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -756,7 +756,7 @@ static int psp_tmr_init(struct psp_context *psp)
756756
}
757757

758758
pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
759-
ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE(psp->adev),
759+
ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_ALIGNMENT,
760760
AMDGPU_GEM_DOMAIN_VRAM,
761761
&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
762762

‎drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,7 @@
3636
#define PSP_CMD_BUFFER_SIZE 0x1000
3737
#define PSP_1_MEG 0x100000
3838
#define PSP_TMR_SIZE(adev) ((adev)->asic_type == CHIP_ALDEBARAN ? 0x800000 : 0x400000)
39+
#define PSP_TMR_ALIGNMENT 0x100000
3940
#define PSP_FW_NAME_LEN 0x24
4041

4142
enum psp_shared_mem_size {

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1811,7 +1811,8 @@ static void amdgpu_ras_log_on_err_counter(struct amdgpu_device *adev)
18111811
amdgpu_ras_query_error_status(adev, &info);
18121812

18131813
if (adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 2) &&
1814-
adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 4)) {
1814+
adev->ip_versions[MP0_HWIP][0] != IP_VERSION(11, 0, 4) &&
1815+
adev->ip_versions[MP0_HWIP][0] != IP_VERSION(13, 0, 0)) {
18151816
if (amdgpu_ras_reset_error_status(adev, info.head.block))
18161817
dev_warn(adev->dev, "Failed to reset error counter and error status");
18171818
}

‎drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c‎

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -380,6 +380,7 @@ static void nbio_v2_3_enable_aspm(struct amdgpu_device *adev,
380380
WREG32_PCIE(smnPCIE_LC_CNTL, data);
381381
}
382382

383+
#ifdef CONFIG_PCIEASPM
383384
static void nbio_v2_3_program_ltr(struct amdgpu_device *adev)
384385
{
385386
uint32_t def, data;
@@ -401,9 +402,11 @@ static void nbio_v2_3_program_ltr(struct amdgpu_device *adev)
401402
if (def != data)
402403
WREG32_PCIE(smnBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data);
403404
}
405+
#endif
404406

405407
static void nbio_v2_3_program_aspm(struct amdgpu_device *adev)
406408
{
409+
#ifdef CONFIG_PCIEASPM
407410
uint32_t def, data;
408411

409412
def = data = RREG32_PCIE(smnPCIE_LC_CNTL);
@@ -459,7 +462,10 @@ static void nbio_v2_3_program_aspm(struct amdgpu_device *adev)
459462
if (def != data)
460463
WREG32_PCIE(smnPCIE_LC_CNTL6, data);
461464

462-
nbio_v2_3_program_ltr(adev);
465+
/* Don't bother about LTR if LTR is not enabled
466+
* in the path */
467+
if (adev->pdev->ltr_path)
468+
nbio_v2_3_program_ltr(adev);
463469

464470
def = data = RREG32_SOC15(NBIO, 0, mmRCC_BIF_STRAP3);
465471
data |= 0x5DE0 << RCC_BIF_STRAP3__STRAP_VLINK_ASPM_IDLE_TIMER__SHIFT;
@@ -483,6 +489,7 @@ static void nbio_v2_3_program_aspm(struct amdgpu_device *adev)
483489
data &= ~PCIE_LC_CNTL3__LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK_MASK;
484490
if (def != data)
485491
WREG32_PCIE(smnPCIE_LC_CNTL3, data);
492+
#endif
486493
}
487494

488495
static void nbio_v2_3_apply_lc_spc_mode_wa(struct amdgpu_device *adev)

‎drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c‎

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -282,6 +282,7 @@ static void nbio_v6_1_init_registers(struct amdgpu_device *adev)
282282
mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;
283283
}
284284

285+
#ifdef CONFIG_PCIEASPM
285286
static void nbio_v6_1_program_ltr(struct amdgpu_device *adev)
286287
{
287288
uint32_t def, data;
@@ -303,9 +304,11 @@ static void nbio_v6_1_program_ltr(struct amdgpu_device *adev)
303304
if (def != data)
304305
WREG32_PCIE(smnBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data);
305306
}
307+
#endif
306308

307309
static void nbio_v6_1_program_aspm(struct amdgpu_device *adev)
308310
{
311+
#ifdef CONFIG_PCIEASPM
309312
uint32_t def, data;
310313

311314
def = data = RREG32_PCIE(smnPCIE_LC_CNTL);
@@ -361,7 +364,10 @@ static void nbio_v6_1_program_aspm(struct amdgpu_device *adev)
361364
if (def != data)
362365
WREG32_PCIE(smnPCIE_LC_CNTL6, data);
363366

364-
nbio_v6_1_program_ltr(adev);
367+
/* Don't bother about LTR if LTR is not enabled
368+
* in the path */
369+
if (adev->pdev->ltr_path)
370+
nbio_v6_1_program_ltr(adev);
365371

366372
def = data = RREG32_PCIE(smnRCC_BIF_STRAP3);
367373
data |= 0x5DE0 << RCC_BIF_STRAP3__STRAP_VLINK_ASPM_IDLE_TIMER__SHIFT;
@@ -385,6 +391,7 @@ static void nbio_v6_1_program_aspm(struct amdgpu_device *adev)
385391
data &= ~PCIE_LC_CNTL3__LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK_MASK;
386392
if (def != data)
387393
WREG32_PCIE(smnPCIE_LC_CNTL3, data);
394+
#endif
388395
}
389396

390397
const struct amdgpu_nbio_funcs nbio_v6_1_funcs = {

‎drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c‎

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -673,6 +673,7 @@ struct amdgpu_nbio_ras nbio_v7_4_ras = {
673673
};
674674

675675

676+
#ifdef CONFIG_PCIEASPM
676677
static void nbio_v7_4_program_ltr(struct amdgpu_device *adev)
677678
{
678679
uint32_t def, data;
@@ -694,9 +695,11 @@ static void nbio_v7_4_program_ltr(struct amdgpu_device *adev)
694695
if (def != data)
695696
WREG32_PCIE(smnBIF_CFG_DEV0_EPF0_DEVICE_CNTL2, data);
696697
}
698+
#endif
697699

698700
static void nbio_v7_4_program_aspm(struct amdgpu_device *adev)
699701
{
702+
#ifdef CONFIG_PCIEASPM
700703
uint32_t def, data;
701704

702705
if (adev->ip_versions[NBIO_HWIP][0] == IP_VERSION(7, 4, 4))
@@ -755,7 +758,10 @@ static void nbio_v7_4_program_aspm(struct amdgpu_device *adev)
755758
if (def != data)
756759
WREG32_PCIE(smnPCIE_LC_CNTL6, data);
757760

758-
nbio_v7_4_program_ltr(adev);
761+
/* Don't bother about LTR if LTR is not enabled
762+
* in the path */
763+
if (adev->pdev->ltr_path)
764+
nbio_v7_4_program_ltr(adev);
759765

760766
def = data = RREG32_PCIE(smnRCC_BIF_STRAP3);
761767
data |= 0x5DE0 << RCC_BIF_STRAP3__STRAP_VLINK_ASPM_IDLE_TIMER__SHIFT;
@@ -779,6 +785,7 @@ static void nbio_v7_4_program_aspm(struct amdgpu_device *adev)
779785
data &= ~PCIE_LC_CNTL3__LC_DSC_DONT_ENTER_L23_AFTER_PME_ACK_MASK;
780786
if (def != data)
781787
WREG32_PCIE(smnPCIE_LC_CNTL3, data);
788+
#endif
782789
}
783790

784791
const struct amdgpu_nbio_funcs nbio_v7_4_funcs = {

‎drivers/gpu/drm/amd/amdgpu/nbio_v7_7.c‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,14 @@
2828
#include "nbio/nbio_7_7_0_sh_mask.h"
2929
#include <uapi/linux/kfd_ioctl.h>
3030

31+
static void nbio_v7_7_remap_hdp_registers(struct amdgpu_device *adev)
32+
{
33+
WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL,
34+
adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL);
35+
WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL,
36+
adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL);
37+
}
38+
3139
static u32 nbio_v7_7_get_rev_id(struct amdgpu_device *adev)
3240
{
3341
u32 tmp;
@@ -336,4 +344,5 @@ const struct amdgpu_nbio_funcs nbio_v7_7_funcs = {
336344
.get_clockgating_state = nbio_v7_7_get_clockgating_state,
337345
.ih_control = nbio_v7_7_ih_control,
338346
.init_registers = nbio_v7_7_init_registers,
347+
.remap_hdp_registers = nbio_v7_7_remap_hdp_registers,
339348
};

‎drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1504,6 +1504,11 @@ static int sdma_v4_0_start(struct amdgpu_device *adev)
15041504
WREG32_SDMA(i, mmSDMA0_CNTL, temp);
15051505

15061506
if (!amdgpu_sriov_vf(adev)) {
1507+
ring = &adev->sdma.instance[i].ring;
1508+
adev->nbio.funcs->sdma_doorbell_range(adev, i,
1509+
ring->use_doorbell, ring->doorbell_index,
1510+
adev->doorbell_index.sdma_doorbell_range);
1511+
15071512
/* unhalt engine */
15081513
temp = RREG32_SDMA(i, mmSDMA0_F32_CNTL);
15091514
temp = REG_SET_FIELD(temp, SDMA0_F32_CNTL, HALT, 0);

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