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Made eqy runnable
Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com>
1 parent e04628b commit 6a1610f

1 file changed

Lines changed: 18 additions & 3 deletions

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test/helpers.tcl

Lines changed: 18 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -74,6 +74,21 @@ proc run_equivalence_test { test lib remove_cells } {
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# tclint-disable-next-line line-length
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puts $outfile "\[gate]\nread_verilog -sv $after_netlist $lib_files\nprep -top $top_cell -flatten\nmemory_map\n\n"
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# Recommendation from eqy team on how to speed up a design
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puts $outfile "\[match *]\ngate-nomatch _*_.*"
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# See issue OpenROAD#6545 "Equivalence check failure due to non-unique resizer nets"
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puts $outfile "gate-nomatch net*"
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# Forbid matching on buffer instances or cloned instances to make it less
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# likely EQY will fail to prove equivalence because of its assuming structural
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# similarity between gold and gate netlists. This doesn't remove coverage.
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puts $outfile "gate-nomatch clone*"
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puts $outfile "gate-nomatch place*"
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puts $outfile "gate-nomatch rebuffer*"
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puts $outfile "gate-nomatch wire*"
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puts $outfile "gate-nomatch place*\n\n"
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# Equivalence check recipe
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puts $outfile "\[strategy basic]\nuse sat\ndepth 10\n\n"
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close $outfile
@@ -83,9 +98,9 @@ proc run_equivalence_test { test lib remove_cells } {
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catch { exec eqy -d $run_dir $test_script > /dev/null }
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set count 0
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catch {
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set count [
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exec grep -c "Successfully proved designs equivalent"
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$run_dir/logfile.txt
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set count [ \
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exec grep -c "Successfully proved designs equivalent" \
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$run_dir/logfile.txt \
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]
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}
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if { $count == 0 } {

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