2323#include "src/rp2_common/hardware_sync/include/hardware/sync.h"
2424
2525#include "hardware/watchdog.h"
26+ #include "hardware/irq.h"
2627
2728void common_hal_mcu_delay_us (uint32_t delay ) {
2829 mp_hal_delay_us (delay );
2930}
3031
3132volatile uint32_t nesting_count = 0 ;
33+ #ifdef PICO_RP2040
3234void common_hal_mcu_disable_interrupts (void ) {
3335 // We don't use save_and_disable_interrupts() from the sdk because we don't want to worry about PRIMASK.
3436 // This is what we do on the SAMD21 via CMSIS.
@@ -48,6 +50,38 @@ void common_hal_mcu_enable_interrupts(void) {
4850 __dmb ();
4951 asm volatile ("cpsie i" : : : "memory" );
5052}
53+ #else
54+ #include "src/rp2_common/cmsis/stub/CMSIS/Device/RP2350/Include/RP2350.h"
55+ #define PICO_ELEVATED_IRQ_PRIORITY (0x60) // between PICO_DEFAULT and PIOCO_HIGHEST_IRQ_PRIORITY
56+ static uint32_t oldBasePri = 0 ; // 0 (default) masks nothing, other values mask equal-or-larger priority values
57+ void common_hal_mcu_disable_interrupts (void ) {
58+ if (nesting_count == 0 ) {
59+ // We must keep DMA_IRQ_1 (reserved for pico dvi) enabled at all times,
60+ // including during flash writes. Do this by setting the priority mask (BASEPRI
61+ // register).
62+ // grab old base priority
63+ oldBasePri = __get_BASEPRI ();
64+ // and set the new one
65+ __set_BASEPRI_MAX (PICO_ELEVATED_IRQ_PRIORITY );
66+ __isb (); // Instruction synchronization barrier
67+ }
68+ nesting_count ++ ;
69+ }
70+
71+ void common_hal_mcu_enable_interrupts (void ) {
72+ uint32_t my_interrupts = save_and_disable_interrupts ();
73+ if (nesting_count == 0 ) {
74+ reset_into_safe_mode (SAFE_MODE_INTERRUPT_ERROR );
75+ }
76+ nesting_count -- ;
77+ if (nesting_count == 0 ) {
78+ // return to the old priority setting
79+ __set_BASEPRI (oldBasePri );
80+ __isb (); // Instruction synchronization barrier
81+ }
82+ restore_interrupts (my_interrupts );
83+ }
84+ #endif
5185
5286static bool next_reset_to_bootloader = false;
5387
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