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Disable f16 portable-simd tests on x86_64-pc-windows-gnu
It is currently broken on x86_64-pc-windows-gnu
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‎patches/0001-portable-simd-Disable-f16-usage-in-portable-simd.patch‎

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From 2aa88b261ffb51d3f18a4b9d3b79232d7445e5f3 Mon Sep 17 00:00:00 2001
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From: bjorn3 <17426603+bjorn3@users.noreply.github.com>
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Date: Thu, 16 Apr 2026 17:29:02 +0200
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Subject: [PATCH] Disable f16 usage in portable-simd
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It is currently broken on x86_64-pc-windows-gnu
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---
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Cargo.toml | 8 ++------
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crates/core_simd/src/alias.rs | 10 ----------
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crates/core_simd/src/cast.rs | 3 ---
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crates/core_simd/src/lib.rs | 1 -
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crates/core_simd/src/ops.rs | 2 +-
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crates/core_simd/src/ops/unary.rs | 2 --
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crates/core_simd/src/simd/cmp/eq.rs | 2 +-
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crates/core_simd/src/simd/cmp/ord.rs | 2 +-
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crates/core_simd/src/simd/num/float.rs | 2 +-
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crates/core_simd/src/vector.rs | 7 -------
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crates/core_simd/tests/f16_ops.rs | 10 ----------
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crates/std_float/src/lib.rs | 9 ---------
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crates/test_helpers/src/biteq.rs | 2 +-
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crates/test_helpers/src/lib.rs | 2 --
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crates/test_helpers/src/subnormals.rs | 2 +-
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15 files changed, 8 insertions(+), 56 deletions(-)
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delete mode 100644 crates/core_simd/tests/f16_ops.rs
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diff --git a/Cargo.toml b/Cargo.toml
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index 883140b..45296b4 100644
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--- a/Cargo.toml
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+++ b/Cargo.toml
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@@ -1,10 +1,6 @@
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[workspace]
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resolver = "1"
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-members = [
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- "crates/core_simd",
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- "crates/std_float",
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- "crates/test_helpers",
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-]
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+members = ["crates/core_simd", "crates/std_float", "crates/test_helpers"]
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[profile.test.package."*"]
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opt-level = 2
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@@ -15,4 +11,4 @@ opt-level = 2
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[workspace.dependencies.proptest]
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version = "1.11"
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default-features = false
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-features = ["alloc", "f16"]
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+features = ["alloc"]
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diff --git a/crates/core_simd/src/alias.rs b/crates/core_simd/src/alias.rs
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index 6dcfcb6..23f121c 100644
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--- a/crates/core_simd/src/alias.rs
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+++ b/crates/core_simd/src/alias.rs
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@@ -153,16 +153,6 @@ alias! {
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usizex64 64
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}
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- f16 = {
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- f16x1 1
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- f16x2 2
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- f16x4 4
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- f16x8 8
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- f16x16 16
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- f16x32 32
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- f16x64 64
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- }
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-
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f32 = {
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f32x1 1
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f32x2 2
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diff --git a/crates/core_simd/src/cast.rs b/crates/core_simd/src/cast.rs
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index 69dc7ba..1c3592f 100644
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--- a/crates/core_simd/src/cast.rs
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+++ b/crates/core_simd/src/cast.rs
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@@ -44,9 +44,6 @@ impl SimdCast for u64 {}
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unsafe impl Sealed for usize {}
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impl SimdCast for usize {}
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// Safety: primitive number types can be cast to other primitive number types
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-unsafe impl Sealed for f16 {}
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-impl SimdCast for f16 {}
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-// Safety: primitive number types can be cast to other primitive number types
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unsafe impl Sealed for f32 {}
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impl SimdCast for f32 {}
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// Safety: primitive number types can be cast to other primitive number types
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diff --git a/crates/core_simd/src/lib.rs b/crates/core_simd/src/lib.rs
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index 413a886..115be44 100644
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--- a/crates/core_simd/src/lib.rs
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+++ b/crates/core_simd/src/lib.rs
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@@ -1,7 +1,6 @@
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#![no_std]
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#![feature(
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convert_float_to_int,
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- f16,
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core_intrinsics,
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decl_macro,
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repr_simd,
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diff --git a/crates/core_simd/src/ops.rs b/crates/core_simd/src/ops.rs
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index c0a06ed..eb6601f 100644
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--- a/crates/core_simd/src/ops.rs
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+++ b/crates/core_simd/src/ops.rs
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@@ -245,7 +245,7 @@ for_base_ops! {
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// We don't need any special precautions here:
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// Floats always accept arithmetic ops, but may become NaN.
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for_base_ops! {
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- T = (f16, f32, f64);
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+ T = (f32, f64);
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type Lhs = Simd<T, N>;
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type Rhs = Simd<T, N>;
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type Output = Self;
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diff --git a/crates/core_simd/src/ops/unary.rs b/crates/core_simd/src/ops/unary.rs
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index af7aa8a..e1c0616 100644
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--- a/crates/core_simd/src/ops/unary.rs
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+++ b/crates/core_simd/src/ops/unary.rs
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@@ -19,8 +19,6 @@ macro_rules! neg {
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}
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neg! {
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- impl<const N: usize> Neg for Simd<f16, N>
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-
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impl<const N: usize> Neg for Simd<f32, N>
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impl<const N: usize> Neg for Simd<f64, N>
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diff --git a/crates/core_simd/src/simd/cmp/eq.rs b/crates/core_simd/src/simd/cmp/eq.rs
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index 7683640..d553d6c 100644
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--- a/crates/core_simd/src/simd/cmp/eq.rs
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+++ b/crates/core_simd/src/simd/cmp/eq.rs
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@@ -42,7 +42,7 @@ macro_rules! impl_number {
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}
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}
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-impl_number! { f16, f32, f64, u8, u16, u32, u64, usize, i8, i16, i32, i64, isize }
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+impl_number! { f32, f64, u8, u16, u32, u64, usize, i8, i16, i32, i64, isize }
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macro_rules! impl_mask {
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{ $($integer:ty),* } => {
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diff --git a/crates/core_simd/src/simd/cmp/ord.rs b/crates/core_simd/src/simd/cmp/ord.rs
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index 5a4e74c..5672fbb 100644
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--- a/crates/core_simd/src/simd/cmp/ord.rs
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+++ b/crates/core_simd/src/simd/cmp/ord.rs
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@@ -144,7 +144,7 @@ macro_rules! impl_float {
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}
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}
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-impl_float! { f16, f32, f64 }
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+impl_float! { f32, f64 }
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macro_rules! impl_mask {
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{ $($integer:ty),* } => {
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diff --git a/crates/core_simd/src/simd/num/float.rs b/crates/core_simd/src/simd/num/float.rs
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index 510f4c9..175cbce 100644
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--- a/crates/core_simd/src/simd/num/float.rs
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+++ b/crates/core_simd/src/simd/num/float.rs
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@@ -444,4 +444,4 @@ macro_rules! impl_trait {
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}
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}
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-impl_trait! { f16 { bits: u16, mask: i16 }, f32 { bits: u32, mask: i32 }, f64 { bits: u64, mask: i64 } }
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+impl_trait! { f32 { bits: u32, mask: i32 }, f64 { bits: u64, mask: i64 } }
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diff --git a/crates/core_simd/src/vector.rs b/crates/core_simd/src/vector.rs
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index fbef69f..c8e0b8c 100644
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--- a/crates/core_simd/src/vector.rs
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+++ b/crates/core_simd/src/vector.rs
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@@ -1146,13 +1146,6 @@ unsafe impl SimdElement for isize {
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type Mask = isize;
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}
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-impl Sealed for f16 {}
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-
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-// Safety: f16 is a valid SIMD element type, and is supported by this API
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-unsafe impl SimdElement for f16 {
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- type Mask = i16;
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-}
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-
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impl Sealed for f32 {}
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// Safety: f32 is a valid SIMD element type, and is supported by this API
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diff --git a/crates/core_simd/tests/f16_ops.rs b/crates/core_simd/tests/f16_ops.rs
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deleted file mode 100644
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index f89bdf4..0000000
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--- a/crates/core_simd/tests/f16_ops.rs
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+++ /dev/null
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@@ -1,10 +0,0 @@
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-#![feature(portable_simd)]
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-#![feature(f16)]
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-
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-#[macro_use]
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-mod ops_macros;
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-
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-// FIXME: some f16 operations cause rustc to hang on wasm simd
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-// https://github.com/llvm/llvm-project/issues/189251
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-#[cfg(not(all(target_arch = "wasm32", target_feature = "simd128")))]
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-impl_float_tests! { f16, i16 }
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diff --git a/crates/std_float/src/lib.rs b/crates/std_float/src/lib.rs
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index ff35254..acc1bfc 100644
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--- a/crates/std_float/src/lib.rs
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+++ b/crates/std_float/src/lib.rs
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@@ -2,7 +2,6 @@
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feature = "as_crate",
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feature(core_intrinsics),
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feature(portable_simd),
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- feature(f16),
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allow(internal_features)
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)]
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#[cfg(not(feature = "as_crate"))]
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@@ -170,17 +169,9 @@ pub trait StdFloat: Sealed + Sized {
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fn fract(self) -> Self;
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}
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-impl<const N: usize> Sealed for Simd<f16, N> {}
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impl<const N: usize> Sealed for Simd<f32, N> {}
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impl<const N: usize> Sealed for Simd<f64, N> {}
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-impl<const N: usize> StdFloat for Simd<f16, N> {
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- #[inline]
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- fn fract(self) -> Self {
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- self - self.trunc()
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- }
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-}
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-
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impl<const N: usize> StdFloat for Simd<f32, N> {
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#[inline]
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fn fract(self) -> Self {
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diff --git a/crates/test_helpers/src/biteq.rs b/crates/test_helpers/src/biteq.rs
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index 36761e3..cbc20cd 100644
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--- a/crates/test_helpers/src/biteq.rs
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+++ b/crates/test_helpers/src/biteq.rs
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@@ -53,7 +53,7 @@ macro_rules! impl_float_biteq {
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};
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}
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-impl_float_biteq! { f16, f32, f64 }
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+impl_float_biteq! { f32, f64 }
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impl<T> BitEq for *const T {
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fn biteq(&self, other: &Self) -> bool {
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diff --git a/crates/test_helpers/src/lib.rs b/crates/test_helpers/src/lib.rs
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index 82adb06..4b03674 100644
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--- a/crates/test_helpers/src/lib.rs
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+++ b/crates/test_helpers/src/lib.rs
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@@ -1,4 +1,3 @@
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-#![feature(f16)]
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#![cfg_attr(
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any(target_arch = "powerpc", target_arch = "powerpc64"),
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feature(powerpc_target_feature, stdarch_powerpc)
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@@ -47,7 +46,6 @@ impl_num! { u16 }
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impl_num! { u32 }
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impl_num! { u64 }
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impl_num! { usize }
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-impl_num! { f16 }
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impl_num! { f32 }
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impl_num! { f64 }
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diff --git a/crates/test_helpers/src/subnormals.rs b/crates/test_helpers/src/subnormals.rs
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index 44dfbb3..b5f19ba 100644
253+
--- a/crates/test_helpers/src/subnormals.rs
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+++ b/crates/test_helpers/src/subnormals.rs
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@@ -39,7 +39,7 @@ macro_rules! impl_else {
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}
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}
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-impl_float! { f16, f32, f64 }
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+impl_float! { f32, f64 }
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impl_else! { i8, i16, i32, i64, isize, u8, u16, u32, u64, usize }
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/// AltiVec should flush subnormal inputs to zero, but QEMU seems to only flush outputs.
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--
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2.53.0
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