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bjorn3bjorn3
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Rustup to rustc 1.97.0-nightly (a5c825cd8 2026-04-14)
1 parent e51a166 commit c08e62a

2 files changed

Lines changed: 127 additions & 14 deletions

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‎rust-toolchain.toml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
11
[toolchain]
2-
channel = "nightly-2026-04-12"
2+
channel = "nightly-2026-04-15"
33
components = ["rust-src", "rustc-dev", "llvm-tools", "rustfmt"]
44
profile = "minimal"

‎src/intrinsics/simd.rs‎

Lines changed: 126 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -91,23 +91,26 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
9191
fx.bcx.ins().icmp(IntCC::SignedGreaterThanOrEqual, x_lane, y_lane)
9292
}
9393

94+
// FIXME(bytecodealliance/wasmtime#8312): Replace with Cranelift
95+
// `fcmp` once `f16`/`f128` backend lowerings have been added to
96+
// Cranelift.
9497
(ty::Float(_), sym::simd_eq) => {
95-
fx.bcx.ins().fcmp(FloatCC::Equal, x_lane, y_lane)
98+
codegen_f16_f128::fcmp(fx, FloatCC::Equal, x_lane, y_lane)
9699
}
97100
(ty::Float(_), sym::simd_ne) => {
98-
fx.bcx.ins().fcmp(FloatCC::NotEqual, x_lane, y_lane)
101+
codegen_f16_f128::fcmp(fx, FloatCC::NotEqual, x_lane, y_lane)
99102
}
100103
(ty::Float(_), sym::simd_lt) => {
101-
fx.bcx.ins().fcmp(FloatCC::LessThan, x_lane, y_lane)
104+
codegen_f16_f128::fcmp(fx, FloatCC::LessThan, x_lane, y_lane)
102105
}
103106
(ty::Float(_), sym::simd_le) => {
104-
fx.bcx.ins().fcmp(FloatCC::LessThanOrEqual, x_lane, y_lane)
107+
codegen_f16_f128::fcmp(fx, FloatCC::LessThanOrEqual, x_lane, y_lane)
105108
}
106109
(ty::Float(_), sym::simd_gt) => {
107-
fx.bcx.ins().fcmp(FloatCC::GreaterThan, x_lane, y_lane)
110+
codegen_f16_f128::fcmp(fx, FloatCC::GreaterThan, x_lane, y_lane)
108111
}
109112
(ty::Float(_), sym::simd_ge) => {
110-
fx.bcx.ins().fcmp(FloatCC::GreaterThanOrEqual, x_lane, y_lane)
113+
codegen_f16_f128::fcmp(fx, FloatCC::GreaterThanOrEqual, x_lane, y_lane)
111114
}
112115

113116
_ => unreachable!(),
@@ -391,6 +394,7 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
391394
intrinsic,
392395
) {
393396
(ty::Int(_), sym::simd_neg) => fx.bcx.ins().ineg(lane),
397+
(ty::Float(FloatTy::F16), sym::simd_neg) => codegen_f16_f128::neg_f16(fx, lane),
394398
(ty::Float(_), sym::simd_neg) => fx.bcx.ins().fneg(lane),
395399

396400
(ty::Uint(ty::UintTy::U8) | ty::Int(ty::IntTy::I8), sym::simd_bswap) => lane,
@@ -418,7 +422,18 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
418422

419423
// FIXME use vector instructions when possible
420424
simd_pair_for_each_lane(fx, x, y, ret, &|fx, lane_ty, _ret_lane_ty, x_lane, y_lane| {
421-
match (lane_ty.kind(), intrinsic) {
425+
// FIXME(bytecodealliance/wasmtime#8312): Remove once backend lowerings have
426+
// been added to Cranelift.
427+
let (x_lane, y_lane) = if *lane_ty.kind() == ty::Float(FloatTy::F16) {
428+
(
429+
codegen_f16_f128::f16_to_f32(fx, x_lane),
430+
codegen_f16_f128::f16_to_f32(fx, y_lane),
431+
)
432+
} else {
433+
(x_lane, y_lane)
434+
};
435+
436+
let res = match (lane_ty.kind(), intrinsic) {
422437
(ty::Uint(_), sym::simd_add) => fx.bcx.ins().iadd(x_lane, y_lane),
423438
(ty::Uint(_), sym::simd_sub) => fx.bcx.ins().isub(x_lane, y_lane),
424439
(ty::Uint(_), sym::simd_mul) => fx.bcx.ins().imul(x_lane, y_lane),
@@ -435,6 +450,16 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
435450
(ty::Float(_), sym::simd_sub) => fx.bcx.ins().fsub(x_lane, y_lane),
436451
(ty::Float(_), sym::simd_mul) => fx.bcx.ins().fmul(x_lane, y_lane),
437452
(ty::Float(_), sym::simd_div) => fx.bcx.ins().fdiv(x_lane, y_lane),
453+
(ty::Float(FloatTy::F16), sym::simd_rem) => fx.lib_call(
454+
"fmodf",
455+
vec![AbiParam::new(types::F32), AbiParam::new(types::F32)],
456+
vec![AbiParam::new(types::F32)],
457+
// FIXME(bytecodealliance/wasmtime#8312): Already converted
458+
// by the FIXME above.
459+
// fx.bcx.ins().fpromote(types::F32, lhs),
460+
// fx.bcx.ins().fpromote(types::F32, rhs),
461+
&[x_lane, y_lane],
462+
)[0],
438463
(ty::Float(FloatTy::F32), sym::simd_rem) => fx.lib_call(
439464
"fmodf",
440465
vec![AbiParam::new(types::F32), AbiParam::new(types::F32)],
@@ -461,6 +486,15 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
461486
(ty::Int(_), sym::simd_xor) => fx.bcx.ins().bxor(x_lane, y_lane),
462487

463488
_ => unreachable!(),
489+
};
490+
491+
if *lane_ty.kind() == ty::Float(FloatTy::F16) {
492+
// FIXME(bytecodealliance/wasmtime#8312): Use native Cranelift
493+
// operation once Cranelift backend lowerings have been
494+
// implemented.
495+
codegen_f16_f128::f32_to_f16(fx, res)
496+
} else {
497+
res
464498
}
465499
});
466500
}
@@ -486,7 +520,11 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
486520
let b_lane = b.value_lane(fx, lane).load_scalar(fx);
487521
let c_lane = c.value_lane(fx, lane).load_scalar(fx);
488522

489-
let res_lane = fx.bcx.ins().fma(a_lane, b_lane, c_lane);
523+
let res_lane = if *lane_ty.kind() == ty::Float(FloatTy::F16) {
524+
codegen_f16_f128::fma_f16(fx, a_lane, b_lane, c_lane)
525+
} else {
526+
fx.bcx.ins().fma(a_lane, b_lane, c_lane)
527+
};
490528
let res_lane = CValue::by_val(res_lane, res_lane_layout);
491529

492530
ret.place_lane(fx, lane).write_cvalue(fx, res_lane);
@@ -584,13 +622,28 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
584622
ty::Float(_) => {}
585623
_ => unreachable!("{:?}", lane_ty),
586624
}
587-
match intrinsic {
625+
// FIXME(bytecodealliance/wasmtime#8312): Remove once backend lowerings have
626+
// been added to Cranelift.
627+
let lane = if *lane_ty.kind() == ty::Float(FloatTy::F16) {
628+
codegen_f16_f128::f16_to_f32(fx, lane)
629+
} else {
630+
lane
631+
};
632+
let res = match intrinsic {
588633
sym::simd_fabs => fx.bcx.ins().fabs(lane),
589634
sym::simd_fsqrt => fx.bcx.ins().sqrt(lane),
590635
sym::simd_ceil => fx.bcx.ins().ceil(lane),
591636
sym::simd_floor => fx.bcx.ins().floor(lane),
592637
sym::simd_trunc => fx.bcx.ins().trunc(lane),
593638
_ => unreachable!(),
639+
};
640+
if *lane_ty.kind() == ty::Float(FloatTy::F16) {
641+
// FIXME(bytecodealliance/wasmtime#8312): Use native Cranelift
642+
// operation once Cranelift backend lowerings have been
643+
// implemented.
644+
codegen_f16_f128::f32_to_f16(fx, res)
645+
} else {
646+
res
594647
}
595648
});
596649
}
@@ -607,7 +660,22 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
607660

608661
simd_reduce(fx, v, Some(acc), ret, &|fx, lane_ty, a, b| {
609662
if lane_ty.is_floating_point() {
610-
fx.bcx.ins().fadd(a, b)
663+
// FIXME(bytecodealliance/wasmtime#8312): Remove once backend lowerings have
664+
// been added to Cranelift.
665+
let (a, b) = if *lane_ty.kind() == ty::Float(FloatTy::F16) {
666+
(codegen_f16_f128::f16_to_f32(fx, a), codegen_f16_f128::f16_to_f32(fx, b))
667+
} else {
668+
(a, b)
669+
};
670+
let res = fx.bcx.ins().fadd(a, b);
671+
if *lane_ty.kind() == ty::Float(FloatTy::F16) {
672+
// FIXME(bytecodealliance/wasmtime#8312): Use native Cranelift
673+
// operation once Cranelift backend lowerings have been
674+
// implemented.
675+
codegen_f16_f128::f32_to_f16(fx, res)
676+
} else {
677+
res
678+
}
611679
} else {
612680
fx.bcx.ins().iadd(a, b)
613681
}
@@ -625,7 +693,22 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
625693

626694
simd_reduce(fx, v, None, ret, &|fx, lane_ty, a, b| {
627695
if lane_ty.is_floating_point() {
628-
fx.bcx.ins().fadd(a, b)
696+
// FIXME(bytecodealliance/wasmtime#8312): Remove once backend lowerings have
697+
// been added to Cranelift.
698+
let (a, b) = if *lane_ty.kind() == ty::Float(FloatTy::F16) {
699+
(codegen_f16_f128::f16_to_f32(fx, a), codegen_f16_f128::f16_to_f32(fx, b))
700+
} else {
701+
(a, b)
702+
};
703+
let res = fx.bcx.ins().fadd(a, b);
704+
if *lane_ty.kind() == ty::Float(FloatTy::F16) {
705+
// FIXME(bytecodealliance/wasmtime#8312): Use native Cranelift
706+
// operation once Cranelift backend lowerings have been
707+
// implemented.
708+
codegen_f16_f128::f32_to_f16(fx, res)
709+
} else {
710+
res
711+
}
629712
} else {
630713
fx.bcx.ins().iadd(a, b)
631714
}
@@ -644,7 +727,22 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
644727

645728
simd_reduce(fx, v, Some(acc), ret, &|fx, lane_ty, a, b| {
646729
if lane_ty.is_floating_point() {
647-
fx.bcx.ins().fmul(a, b)
730+
// FIXME(bytecodealliance/wasmtime#8312): Remove once backend lowerings have
731+
// been added to Cranelift.
732+
let (a, b) = if *lane_ty.kind() == ty::Float(FloatTy::F16) {
733+
(codegen_f16_f128::f16_to_f32(fx, a), codegen_f16_f128::f16_to_f32(fx, b))
734+
} else {
735+
(a, b)
736+
};
737+
let res = fx.bcx.ins().fmul(a, b);
738+
if *lane_ty.kind() == ty::Float(FloatTy::F16) {
739+
// FIXME(bytecodealliance/wasmtime#8312): Use native Cranelift
740+
// operation once Cranelift backend lowerings have been
741+
// implemented.
742+
codegen_f16_f128::f32_to_f16(fx, res)
743+
} else {
744+
res
745+
}
648746
} else {
649747
fx.bcx.ins().imul(a, b)
650748
}
@@ -662,7 +760,22 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
662760

663761
simd_reduce(fx, v, None, ret, &|fx, lane_ty, a, b| {
664762
if lane_ty.is_floating_point() {
665-
fx.bcx.ins().fmul(a, b)
763+
// FIXME(bytecodealliance/wasmtime#8312): Remove once backend lowerings have
764+
// been added to Cranelift.
765+
let (a, b) = if *lane_ty.kind() == ty::Float(FloatTy::F16) {
766+
(codegen_f16_f128::f16_to_f32(fx, a), codegen_f16_f128::f16_to_f32(fx, b))
767+
} else {
768+
(a, b)
769+
};
770+
let res = fx.bcx.ins().fmul(a, b);
771+
if *lane_ty.kind() == ty::Float(FloatTy::F16) {
772+
// FIXME(bytecodealliance/wasmtime#8312): Use native Cranelift
773+
// operation once Cranelift backend lowerings have been
774+
// implemented.
775+
codegen_f16_f128::f32_to_f16(fx, res)
776+
} else {
777+
res
778+
}
666779
} else {
667780
fx.bcx.ins().imul(a, b)
668781
}

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